News

CRN4y
The $35B AMD-Xilinx Acquisition: 7 Big Things To Know
CRN dives into the details of the Xilinx deal and what it could mean for the data center and telecom markets, among other things. ‘It’s Not M&A For M&A’s Sake’ In a little over a month ...
Hackaday6y
Getting Started With Free ARM Cores On Xilinx
We reported earlier about Xilinx offering free-to-use ARM Cortex M1 and M3 cores. [Adam Taylor] posted his experiences getting things working and there’s also a video done by [Geek Til It Hertz ...
CRN3y
AMD Completes $49B Xilinx Acquisition, Largest Chip Deal In History
AMD said it has completed its $49 billion acquisition of Xilinx to create the “industry’s high-performance and adaptive computing leader,” marking the largest chip deal in history.
Hackaday4y
Xilinx Makes MIPI CSI And DSI Controller IP Blocks Free To Use With Vivado
As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI (camera serial interface) IP blocks are now bundled with the IDE to be used freely with Xilinx FPGAs.
Design-Reuse7y
Xilinx Single-Chip Solution with On-Chip Redundancy for Functional Safety Speeds Up IEC 61508 Certification and Reduces Systems Development Cost
Nov. 22, 2017 -- Xilinx, Inc. (NASDAQ: XLNX) today announced a single-chip Zynq®-7000 All Programmable SoC functional safety solution to help customers shorten time to IEC 61508 compliance and ...
Design-Reuse22d
Xilinx SATA IP Core
The host and device connections are speed independent ... The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 ...